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Overview Motivation
Specifications of embedded systems,
particularly for communications, portable and multimedia equipment, are
rapidly growing more complex and require System-on-a-Chip (SOC) solutions
that generally integrate diverse hardware and software. Time-to-market
and cost also need to be reduced more than ever before and backed up by
an effective marketing-driven strategy that can meet today's highly competitive
and demanding circumstances. To achieve all this, the product development
process must assure the product specification phase is integrated smoothly
with the product design phase, allowing the customer's or demands, marketing
goals and designer expertise, to be evaluated and analyzed at significantly
less cost in time and resources, and to be rapidly incorporated into the
final product.
Two key elements required to solve the integration of specification and design phases in the SOC design process have been identified: 1) a consistent and continuous design process and exploration of design space from specification design to implementation design; and 2) design reuse, which means not only of component IP but also specification IP and design case IP. Interoperability is the basic assumption of these key elements in the solution of SOC design. Maintaining interoperability of all the tools that are used in the product specification and the implementation design phases requires establishment of a common specification description language and a common data format for exchange. Over the years, many languages and data format have been proposed. Recently, challenges in next generation with C++ based chip design has become clearer. However, most current approaches do not efficiently cover both the specification and design phases, especially the issue of interoperability of tools and design flow between the two phases. Such approaches include UML, which is primarily used for specification design, and C/C++ and VHDL and/or Verilog, which are primarily used for design. ![]() System Design Methodology with SpecC Language
Through many years of research and development, sponsored and collaborated
by numerous Fortune 100 companies, industry consortiums and universities,
SpecC language has been designed and implemented to integrate the specification
and the design phase in the SOC design process. Originally, SpecC language
was developed at University of California, Irvine, with sponsorship from
Toshiba, Hitachi and other companies. SpecC language is a system specification
description language based on C. It allows the same semantics and syntax
to be used to represent specifications in a conceptual system, hardware,
software, and, most importantly, intermediate specification and information
during hardware/software co-design stages.
SpecC Technology Open Consortium: Objective
The purpose of the consortium is to create a de facto standard language
and an interchange format for system specification design in SpecC technology.
It also seeks to integrate specification and design steps in the SOC design
process in SpecC language by encouraging a collaborative effort amongst
embedded software tool vendors, electronics design automation tool vendors,
and systems industries.
Establishing interoperability between various tools at the system specification level enable the marketing division defining a system specification to exchange the specification IP with the engineering division, which produces a design for a particular target that will match the specification. Interoperability lets a company designing systems exchange IP with a company that designs components for use in systems. In this age of the Internet era, specifications exchanges between fabless corporations that defines specifications and designs and their manufacturing contractors will become a key element in the next generation of electronics industry. System industry companies can anticipate major productivity gains from fewer misses in communication between design divisions through a clear, well-established design process from specification to implementation. Easy specification transfers between design phases and between design divisions will reduce the chance of wasteful development. Availability of well-established tool suites in the market will help industry members easily to integrate tools for development of their particular product, resulting in easy capture and evaluation of product specifications and effective design reviews in the implementation phase. Within different application fields, systems have different characteristics and requirements. Although a unified system design methodology can exist, each application field will develop its own design environment, tailored to its needs. Enabling real inter-company and inter-divisional trading of specifications as IP requires the collaboration of the systems, semiconductors, IPs, components, and tool industries. With this kind of public domain consortium activity, participants can effectively request their needs to SpecC technology, which contributes to improve the SOC design process using the SpecC language. These requests and improvements can be applied to tools by tool vendors, to encourage interoperability of various tools for SpecC technology. SpecC Technology Open Consortium: Activities (Provisional)
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